Cadence unveils Maestro AI models to improve chip design efficiency with up to 5X token savings

Cadence has recently announced the new Maestro AI Model Portfolio, which is a collection of domain-specialised AI models designed to power its AI Super Agents across semiconductor and system design workflows.

To start, the platform provides domain-specialised large language models (LLMs), trained decision models and self-improving agent skills across multiple model sizes and architectures. These capabilities work alongside Cadence’s AI Super Agents, including AuraStack, ChipStack, InnoStack and ViraStack, combining frontier, open-weight and specialised models to handle demanding chip and system design tasks.

And with a reinforcement learning environment, Cadence uses feedback from its EDA and SDA tools, engineering datasets and deterministic solvers to evaluate generated designs against real engineering objectives and constraints. This creates a closed learning loop where AI agents can refine their decisions based on verified results.

Initial results from the Maestro learning environment show up to 30% improvement in quality of results and up to 5X greater token efficiency compared with general-purpose foundation models. Cadence attributes these gains to its vertically integrated approach, which combines domain knowledge, curated engineering data, AI Super Agents and evaluation tools.

The agents can interpret specifications, generate design content, analyse results and evaluate engineering trade-offs. They also balance LLM interactions with direct EDA and SDA tool calls, reducing unnecessary token consumption while maintaining execution efficiency.

The firm is also working with NVIDIA to further develop these capabilities through the integration of NVIDIA Nemotron models and the NVIDIA OpenShell Reference Architecture. Their collaboration focuses on using reinforcement learning grounded in feedback from EDA tools and deterministic solvers, allowing AI agents to make better decisions based on engineering requirements and actual design outcomes.

There are already some early industry applications. Socionext is deploying Cadence’s InnoStack AI Super Agent in its production design environment and expects up to 5X overall productivity gains while maintaining design quality. Silicon Labs, meanwhile, has used Cadence Verisium Debug through the ChipStack AI Super Agent to accelerate root-cause analysis and end-to-end debugging during pre-silicon low-power verification.

Availability

The first Maestro AI models will be available to select early access customers in the fourth quarter of 2026. The complete Cadence agentic engineering environment can run on its secure cloud platform, secure public cloud infrastructure or customer-controlled on-premises environments, giving customers flexibility over their data privacy, security, and deployment requirements.